1. Field of the Invention
This invention generally relates to a semiconductor structure, and more specifically to a semiconductor structure having no edge placement variation of well implants relative to the isolation structure.
2. Background of the Invention
CMOS technologies continue scale smaller and smaller. As a result parasitic bipolar leakages become harder to control. In traditional process flows, well implants are defined using purely lithographics definition done independently from lithographic steps used for defining physical isolation structures. This independence creates inherent variability.